OpenCores
URL https://opencores.org/ocsvn/pmodsf3driver/pmodsf3driver/trunk

Subversion Repositories pmodsf3driver

[/] [pmodsf3driver/] [trunk/] [hw/] [sources/] [PmodSF3SPIModes.vhd] - Blame information for rev 2

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 2 ldalmasso
------------------------------------------------------------------------
2
-- Engineer:    Dalmasso Loic
3
-- Create Date: 19/02/2025
4
-- Module Name: PmodSF3SPIModes
5
-- Description:
6
--      Pmod SF3 SPI Modes Handler for the 32 MB NOR Flash Memory MT25QL256ABA:
7
--      - When User Read/Write SPI Mode from/to memory (Non-Volatile / Enhanced Volatile register), the module updates its internal SPI Mode registers
8
--      - According to the Flash Memory specifications:
9
--                      - At Power-up, the SPI Mode from the Non-Volatile register is used
10
--                      - When RESET_NON_VOLATILE_COMMAND (0x99) command is executed, the SPI Mode from the Non-Volatile register is used
11
--                      - When WRITE_ENHANCED_VOLATILE_CONFIG_COMMAND (0x..) command is executed, the SPI Mode from the Enhanced Volatile register is used
12
--
13
--      SPI Single Mode: DQ0 as Input, DQ1 as Output, DQ[3:2] NOT USED
14
--      SPI Dual Mode: DQ[1:0] as InOut, DQ[3:2] NOT USED
15
--      SPI Quad Mode: DQ[3:0] as InOut
16
--
17
--              SPI Mode Bits ('0' = Enable Bit, '1' = Disable Bit)
18
--              | Quad | Dual | SPI Mode Output
19
--              |   0  |   0  | Quad
20
--              |   0  |   1  | Quad
21
--              |   1  |   0  | Dual
22
--              |   1  |   1  | Single (Default)
23
--
24
-- Ports
25
--              Input   -       i_sys_clock: System Input Clock
26
--              Input   -       i_reset: Module Reset ('0': No Reset, '1': Reset)
27
--              Input   -       i_end_of_tx: End of SPI Transmission ('0': In progress, '1': End of Transmission)
28
--              Input   -       i_command: Command Byte
29
--              Input   -       i_new_data_to_mem: New Data to Write on FLASH Ready (Write Mode) ('0': NOT Ready, '1': Ready)
30
--              Input   -       i_data_to_mem: Data Bytes to Write on FLASH
31
--              Input   -       i_data_from_mem_ready: Data Bytes Read from FLASH Ready (Read Mode) ('0': NOT Ready, '1': Ready)
32
--              Input   -       i_data_from_mem: Data Bytes Read from FLASH
33
--              Output  -       o_spi_single_enable: SPI Single Mode Enable ('0': Disable, '1': Enable)
34
--              Output  -       o_spi_dual_enable: SPI Dual Mode Enable ('0': Disable, '1': Enable)
35
--              Output  -       o_spi_quad_enable: SPI Quad Mode Enable ('0': Disable, '1': Enable)
36
------------------------------------------------------------------------
37
 
38
LIBRARY IEEE;
39
USE IEEE.STD_LOGIC_1164.ALL;
40
USE IEEE.NUMERIC_STD.ALL;
41
 
42
ENTITY PmodSF3SPIModes is
43
 
44
PORT(
45
        i_sys_clock: IN STD_LOGIC;
46
        i_reset: IN STD_LOGIC;
47
        i_end_of_tx: IN STD_LOGIC;
48
    i_command: IN UNSIGNED(7 downto 0);
49
        i_new_data_to_mem: IN STD_LOGIC;
50
    i_data_to_mem: IN UNSIGNED(7 downto 0);
51
        i_data_from_mem_ready: IN STD_LOGIC;
52
    i_data_from_mem: IN UNSIGNED(7 downto 0);
53
    o_spi_single_enable: OUT STD_LOGIC;
54
    o_spi_dual_enable: OUT STD_LOGIC;
55
    o_spi_quad_enable: OUT STD_LOGIC
56
);
57
 
58
END PmodSF3SPIModes;
59
 
60
ARCHITECTURE Behavioral of PmodSF3SPIModes is
61
 
62
------------------------------------------------------------------------
63
-- Constant Declarations
64
------------------------------------------------------------------------
65
-- Non Volatile Configuration Register
66
constant WRITE_NON_VOLATILE_COMMAND: UNSIGNED(7 downto 0) := x"B1";
67
constant READ_NON_VOLATILE_COMMAND: UNSIGNED(7 downto 0) := x"B5";
68
constant RESET_NON_VOLATILE_COMMAND: UNSIGNED(7 downto 0) := x"99";
69
constant NON_VOLATILE_CONFIG_REG_SPI_QUAD_BIT: INTEGER := 3;
70
constant NON_VOLATILE_CONFIG_REG_SPI_DUAL_BIT: INTEGER := 2;
71
 
72
-- Enhanced Volatile Configuration Register
73
constant WRITE_ENHANCED_VOLATILE_CONFIG_COMMAND: UNSIGNED(7 downto 0) := x"61";
74
constant READ_ENHANCED_VOLATILE_CONFIG_COMMAND: UNSIGNED(7 downto 0) := x"65";
75
constant ENHANCED_VOLATILE_CONFIG_REG_SPI_QUAD_BIT: INTEGER := 7;
76
constant ENHANCED_VOLATILE_CONFIG_REG_SPI_DUAL_BIT: INTEGER := 6;
77
 
78
-- Internal Register SPI Quad Bit
79
constant INTERNAL_REG_SPI_QUAD_BIT: INTEGER := 1;
80
 
81
-- SPI Mode Output Enable (Note: '0' = Enable Bit, '1' = Disable Bit)
82
constant SPI_SINGLE_MODE: UNSIGNED(1 downto 0) := "11";
83
constant SPI_DUAL_MODE: UNSIGNED(1 downto 0) := "10";
84
constant SPI_QUAD_MODE: UNSIGNED(0 downto 0) := "0";
85
 
86
-- SPI Mode Write Bit Counter
87
constant SPI_BIT_COUNTER_INIT: UNSIGNED(3 downto 0) := "0111";
88
constant SPI_BIT_COUNTER_END: UNSIGNED(3 downto 0) := "1111";
89
 
90
------------------------------------------------------------------------
91
-- Signal Declarations
92
------------------------------------------------------------------------
93
-- Non Volatile SPI Mode Byte
94
signal non_volatile_bit_counter: UNSIGNED(3 downto 0) := SPI_BIT_COUNTER_INIT;
95
signal non_volatile_first_byte: STD_LOGIC := '0';
96
signal non_volatile_second_byte: STD_LOGIC := '0';
97
 
98
-- Non Volatile SPI Mode Register
99
signal non_volatile_spi_mode_reg: UNSIGNED(1 downto 0) := (others => '0');
100
 
101
-- Enhanced Volatile SPI Mode Byte
102
signal enhanced_volatile_first_byte: STD_LOGIC := '0';
103
 
104
-- Enhanced Volatile SPI Mode Register
105
signal enhanced_volatile_spi_mode_reg: UNSIGNED(1 downto 0) := (others => '0');
106
 
107
-- Apply New SPI Mode Trigger
108
signal end_of_tx_reg0: STD_LOGIC := '0';
109
signal end_of_tx_reg1: STD_LOGIC := '0';
110
signal apply_new_spi_mode: STD_LOGIC := '0';
111
 
112
-- SPI Mode Output Register
113
signal spi_mode_out_reg: UNSIGNED(1 downto 0) := (others => '0');
114
 
115
------------------------------------------------------------------------
116
-- Module Implementation
117
------------------------------------------------------------------------
118
begin
119
 
120
        ---------------------------------------------------
121
        -- Non-Volatile Write Byte Configuration Handler --
122
        ---------------------------------------------------
123
        process(i_sys_clock)
124
        begin
125
                if rising_edge(i_sys_clock) then
126
 
127
                        -- First Bit to Write
128
                        if (i_end_of_tx = '1') then
129
                                non_volatile_bit_counter <= SPI_BIT_COUNTER_INIT;
130
 
131
                        -- Next Bit to Write
132
                        elsif (i_command = WRITE_NON_VOLATILE_COMMAND) and (i_new_data_to_mem = '1') and (non_volatile_bit_counter /= SPI_BIT_COUNTER_END) then
133
                                non_volatile_bit_counter <= non_volatile_bit_counter -1;
134
                        end if;
135
                end if;
136
        end process;
137
 
138
        --------------------------------------------------
139
        -- Non-Volatile Read Byte Configuration Handler --
140
        --------------------------------------------------
141
        process(i_sys_clock)
142
        begin
143
                if rising_edge(i_sys_clock) then
144
 
145
                        -- First Byte to Read
146
                        if (i_end_of_tx = '1') then
147
                                non_volatile_first_byte <= '1';
148
 
149
                        -- Next Byte to Read
150
                        elsif (i_command = READ_NON_VOLATILE_COMMAND) and (i_data_from_mem_ready = '1') then
151
                                non_volatile_first_byte <= '0';
152
                        end if;
153
                end if;
154
        end process;
155
 
156
        --------------------------------------------------------
157
        -- Non-Volatile Read/Write Byte Configuration Handler --
158
        --------------------------------------------------------
159
        process(i_sys_clock)
160
        begin
161
                if rising_edge(i_sys_clock) then
162
 
163
                        -- First Byte to Read/Write
164
                        if (i_end_of_tx = '1') then
165
                                non_volatile_second_byte <= '0';
166
 
167
                        -- Next Byte to Write
168
                        elsif (i_command = WRITE_NON_VOLATILE_COMMAND) then
169
 
170
                                -- Second Byte to Write only
171
                                if (non_volatile_bit_counter = "00") then
172
                                        non_volatile_second_byte <= '1';
173
                                else
174
                                        non_volatile_second_byte <= '0';
175
                                end if;
176
 
177
                        -- Next Byte to Read
178
                        elsif (i_command = READ_NON_VOLATILE_COMMAND) then
179
 
180
                                -- Second Byte to Read only
181
                                if (non_volatile_first_byte = '1') then
182
                                        non_volatile_second_byte <= '1';
183
                                else
184
                                        non_volatile_second_byte <= '0';
185
                                end if;
186
 
187
                        end if;
188
                end if;
189
        end process;
190
 
191
        ----------------------------------------
192
        -- Non-Volatile Configuration Handler --
193
        ----------------------------------------
194
        process(i_sys_clock)
195
        begin
196
                if rising_edge(i_sys_clock) then
197
 
198
                        -- Second Byte to Read/Write
199
                        if (non_volatile_second_byte = '1') then
200
 
201
                                -- Write Non-Volatile Configuration Register
202
                                if (i_command = WRITE_NON_VOLATILE_COMMAND) then
203
                                        non_volatile_spi_mode_reg <= i_data_to_mem(NON_VOLATILE_CONFIG_REG_SPI_QUAD_BIT) & i_data_to_mem(NON_VOLATILE_CONFIG_REG_SPI_DUAL_BIT);
204
 
205
                                -- Read Non-Volatile Configuration Register
206
                                elsif (i_command = READ_NON_VOLATILE_COMMAND) then
207
                                        non_volatile_spi_mode_reg <= i_data_from_mem(NON_VOLATILE_CONFIG_REG_SPI_QUAD_BIT) & i_data_from_mem(NON_VOLATILE_CONFIG_REG_SPI_DUAL_BIT);
208
                                end if;
209
                        end if;
210
        end if;
211
    end process;
212
 
213
        -------------------------------------------------------------
214
        -- Enhanced Volatile Read/Write Byte Configuration Handler --
215
        -------------------------------------------------------------
216
        process(i_sys_clock)
217
        begin
218
                if rising_edge(i_sys_clock) then
219
 
220
                        -- First Byte to Read/Write
221
                        if (i_end_of_tx = '1') then
222
                                enhanced_volatile_first_byte <= '1';
223
 
224
                        -- Next Byte to Write
225
                        elsif (i_command = WRITE_ENHANCED_VOLATILE_CONFIG_COMMAND) and (i_new_data_to_mem = '1') then
226
                                enhanced_volatile_first_byte <= '0';
227
 
228
                        -- Next Byte to Read
229
                        elsif (i_command = READ_ENHANCED_VOLATILE_CONFIG_COMMAND) and (i_data_from_mem_ready = '1') then
230
                                enhanced_volatile_first_byte <= '0';
231
                        end if;
232
                end if;
233
        end process;
234
 
235
        ---------------------------------------------
236
        -- Enhanced Volatile Configuration Handler --
237
        ---------------------------------------------
238
        process(i_sys_clock)
239
        begin
240
                if rising_edge(i_sys_clock) then
241
 
242
                        -- First Byte to Read/Write
243
                        if (enhanced_volatile_first_byte = '1') then
244
 
245
                                -- Write Enhanced Volatile Configuration Register
246
                                if (i_command = WRITE_ENHANCED_VOLATILE_CONFIG_COMMAND) then
247
                                        enhanced_volatile_spi_mode_reg <= i_data_to_mem(ENHANCED_VOLATILE_CONFIG_REG_SPI_QUAD_BIT) & i_data_to_mem(ENHANCED_VOLATILE_CONFIG_REG_SPI_DUAL_BIT);
248
 
249
                                -- Read Enhanced Volatile Configuration Register
250
                                elsif (i_data_from_mem_ready = '1') and (i_command = READ_ENHANCED_VOLATILE_CONFIG_COMMAND) then
251
                                        enhanced_volatile_spi_mode_reg <= i_data_from_mem(ENHANCED_VOLATILE_CONFIG_REG_SPI_QUAD_BIT) & i_data_from_mem(ENHANCED_VOLATILE_CONFIG_REG_SPI_DUAL_BIT);
252
                                end if;
253
                        end if;
254
                end if;
255
        end process;
256
 
257
        ------------------------
258
        -- Apply New SPI Mode --
259
        ------------------------
260
        process(i_sys_clock)
261
        begin
262
                if rising_edge(i_sys_clock) then
263
 
264
                        -- End of SPI Transmission Detection
265
                        end_of_tx_reg0 <= i_end_of_tx;
266
                        end_of_tx_reg1 <= end_of_tx_reg0;
267
                end if;
268
        end process;
269
        apply_new_spi_mode <= end_of_tx_reg0 and not(end_of_tx_reg1);
270
 
271
        ------------------------------
272
        -- SPI Mode Output Register --
273
        ------------------------------
274
        process(i_sys_clock)
275
        begin
276
                if rising_edge(i_sys_clock) then
277
 
278
                        -- Reset
279
                        if (i_reset = '1') then
280
                                spi_mode_out_reg <= SPI_SINGLE_MODE;
281
 
282
                        -- Apply New SPI Mode (at the End of SPI Transmission)
283
                        elsif (apply_new_spi_mode = '1') then
284
 
285
                                -- Reset Memory Command (use Non-Volatile SPI Mode)
286
                                if (i_command = RESET_NON_VOLATILE_COMMAND) then
287
                                        spi_mode_out_reg <= non_volatile_spi_mode_reg;
288
 
289
                                -- Write Enhanced Volatile Configuration Register (use Enhanced Volatile SPI Mode)
290
                                elsif (i_command = WRITE_ENHANCED_VOLATILE_CONFIG_COMMAND) or (i_command = READ_ENHANCED_VOLATILE_CONFIG_COMMAND) then
291
                                        spi_mode_out_reg <= enhanced_volatile_spi_mode_reg;
292
                                end if;
293
                        end if;
294
                end if;
295
        end process;
296
 
297
        ----------------------
298
        -- SPI Mode Outputs --
299
        ----------------------
300
    -- SPI Single Mode Enable
301
    o_spi_single_enable <= '1' when (spi_mode_out_reg = SPI_SINGLE_MODE) else '0';
302
 
303
    -- SPI Dual Mode Enable
304
    o_spi_dual_enable <= '1' when (spi_mode_out_reg = SPI_DUAL_MODE) else '0';
305
 
306
    -- SPI Quad Mode Enable
307
    o_spi_quad_enable <= '1' when (spi_mode_out_reg(INTERNAL_REG_SPI_QUAD_BIT) = SPI_QUAD_MODE(0)) else '0';
308
 
309
end Behavioral;

powered by: WebSVN 2.1.0

© copyright 1999-2025 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.