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ldalmasso |
------------------------------------------------------------------------
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-- Engineer: Dalmasso Loic
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-- Create Date: 19/02/2025
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-- Module Name: PmodSF3SPIModes
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-- Description:
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-- Pmod SF3 SPI Modes Handler for the 32 MB NOR Flash Memory MT25QL256ABA:
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-- - When User Read/Write SPI Mode from/to memory (Non-Volatile / Enhanced Volatile register), the module updates its internal SPI Mode registers
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-- - According to the Flash Memory specifications:
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-- - At Power-up, the SPI Mode from the Non-Volatile register is used
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-- - When RESET_NON_VOLATILE_COMMAND (0x99) command is executed, the SPI Mode from the Non-Volatile register is used
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-- - When WRITE_ENHANCED_VOLATILE_CONFIG_COMMAND (0x..) command is executed, the SPI Mode from the Enhanced Volatile register is used
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--
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-- SPI Single Mode: DQ0 as Input, DQ1 as Output, DQ[3:2] NOT USED
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-- SPI Dual Mode: DQ[1:0] as InOut, DQ[3:2] NOT USED
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-- SPI Quad Mode: DQ[3:0] as InOut
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--
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-- SPI Mode Bits ('0' = Enable Bit, '1' = Disable Bit)
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-- | Quad | Dual | SPI Mode Output
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-- | 0 | 0 | Quad
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-- | 0 | 1 | Quad
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-- | 1 | 0 | Dual
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-- | 1 | 1 | Single (Default)
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--
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-- Ports
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-- Input - i_sys_clock: System Input Clock
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-- Input - i_reset: Module Reset ('0': No Reset, '1': Reset)
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-- Input - i_end_of_tx: End of SPI Transmission ('0': In progress, '1': End of Transmission)
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-- Input - i_command: Command Byte
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-- Input - i_new_data_to_mem: New Data to Write on FLASH Ready (Write Mode) ('0': NOT Ready, '1': Ready)
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-- Input - i_data_to_mem: Data Bytes to Write on FLASH
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-- Input - i_data_from_mem_ready: Data Bytes Read from FLASH Ready (Read Mode) ('0': NOT Ready, '1': Ready)
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-- Input - i_data_from_mem: Data Bytes Read from FLASH
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-- Output - o_spi_single_enable: SPI Single Mode Enable ('0': Disable, '1': Enable)
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-- Output - o_spi_dual_enable: SPI Dual Mode Enable ('0': Disable, '1': Enable)
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-- Output - o_spi_quad_enable: SPI Quad Mode Enable ('0': Disable, '1': Enable)
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------------------------------------------------------------------------
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LIBRARY IEEE;
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USE IEEE.STD_LOGIC_1164.ALL;
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USE IEEE.NUMERIC_STD.ALL;
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ENTITY PmodSF3SPIModes is
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PORT(
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i_sys_clock: IN STD_LOGIC;
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i_reset: IN STD_LOGIC;
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i_end_of_tx: IN STD_LOGIC;
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i_command: IN UNSIGNED(7 downto 0);
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i_new_data_to_mem: IN STD_LOGIC;
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i_data_to_mem: IN UNSIGNED(7 downto 0);
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i_data_from_mem_ready: IN STD_LOGIC;
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i_data_from_mem: IN UNSIGNED(7 downto 0);
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o_spi_single_enable: OUT STD_LOGIC;
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o_spi_dual_enable: OUT STD_LOGIC;
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o_spi_quad_enable: OUT STD_LOGIC
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);
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END PmodSF3SPIModes;
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ARCHITECTURE Behavioral of PmodSF3SPIModes is
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------------------------------------------------------------------------
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-- Constant Declarations
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------------------------------------------------------------------------
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-- Non Volatile Configuration Register
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constant WRITE_NON_VOLATILE_COMMAND: UNSIGNED(7 downto 0) := x"B1";
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constant READ_NON_VOLATILE_COMMAND: UNSIGNED(7 downto 0) := x"B5";
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constant RESET_NON_VOLATILE_COMMAND: UNSIGNED(7 downto 0) := x"99";
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constant NON_VOLATILE_CONFIG_REG_SPI_QUAD_BIT: INTEGER := 3;
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constant NON_VOLATILE_CONFIG_REG_SPI_DUAL_BIT: INTEGER := 2;
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-- Enhanced Volatile Configuration Register
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constant WRITE_ENHANCED_VOLATILE_CONFIG_COMMAND: UNSIGNED(7 downto 0) := x"61";
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constant READ_ENHANCED_VOLATILE_CONFIG_COMMAND: UNSIGNED(7 downto 0) := x"65";
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constant ENHANCED_VOLATILE_CONFIG_REG_SPI_QUAD_BIT: INTEGER := 7;
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constant ENHANCED_VOLATILE_CONFIG_REG_SPI_DUAL_BIT: INTEGER := 6;
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-- Internal Register SPI Quad Bit
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constant INTERNAL_REG_SPI_QUAD_BIT: INTEGER := 1;
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-- SPI Mode Output Enable (Note: '0' = Enable Bit, '1' = Disable Bit)
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constant SPI_SINGLE_MODE: UNSIGNED(1 downto 0) := "11";
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constant SPI_DUAL_MODE: UNSIGNED(1 downto 0) := "10";
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constant SPI_QUAD_MODE: UNSIGNED(0 downto 0) := "0";
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-- SPI Mode Write Bit Counter
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constant SPI_BIT_COUNTER_INIT: UNSIGNED(3 downto 0) := "0111";
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constant SPI_BIT_COUNTER_END: UNSIGNED(3 downto 0) := "1111";
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------------------------------------------------------------------------
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-- Signal Declarations
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------------------------------------------------------------------------
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-- Non Volatile SPI Mode Byte
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signal non_volatile_bit_counter: UNSIGNED(3 downto 0) := SPI_BIT_COUNTER_INIT;
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signal non_volatile_first_byte: STD_LOGIC := '0';
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signal non_volatile_second_byte: STD_LOGIC := '0';
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-- Non Volatile SPI Mode Register
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signal non_volatile_spi_mode_reg: UNSIGNED(1 downto 0) := (others => '0');
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-- Enhanced Volatile SPI Mode Byte
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signal enhanced_volatile_first_byte: STD_LOGIC := '0';
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-- Enhanced Volatile SPI Mode Register
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signal enhanced_volatile_spi_mode_reg: UNSIGNED(1 downto 0) := (others => '0');
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-- Apply New SPI Mode Trigger
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signal end_of_tx_reg0: STD_LOGIC := '0';
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signal end_of_tx_reg1: STD_LOGIC := '0';
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signal apply_new_spi_mode: STD_LOGIC := '0';
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-- SPI Mode Output Register
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signal spi_mode_out_reg: UNSIGNED(1 downto 0) := (others => '0');
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------------------------------------------------------------------------
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-- Module Implementation
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------------------------------------------------------------------------
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begin
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---------------------------------------------------
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-- Non-Volatile Write Byte Configuration Handler --
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---------------------------------------------------
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process(i_sys_clock)
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begin
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if rising_edge(i_sys_clock) then
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-- First Bit to Write
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if (i_end_of_tx = '1') then
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non_volatile_bit_counter <= SPI_BIT_COUNTER_INIT;
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-- Next Bit to Write
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elsif (i_command = WRITE_NON_VOLATILE_COMMAND) and (i_new_data_to_mem = '1') and (non_volatile_bit_counter /= SPI_BIT_COUNTER_END) then
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non_volatile_bit_counter <= non_volatile_bit_counter -1;
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end if;
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end if;
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end process;
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--------------------------------------------------
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-- Non-Volatile Read Byte Configuration Handler --
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--------------------------------------------------
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process(i_sys_clock)
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begin
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if rising_edge(i_sys_clock) then
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-- First Byte to Read
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if (i_end_of_tx = '1') then
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non_volatile_first_byte <= '1';
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-- Next Byte to Read
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elsif (i_command = READ_NON_VOLATILE_COMMAND) and (i_data_from_mem_ready = '1') then
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non_volatile_first_byte <= '0';
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end if;
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end if;
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end process;
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--------------------------------------------------------
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-- Non-Volatile Read/Write Byte Configuration Handler --
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--------------------------------------------------------
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process(i_sys_clock)
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begin
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if rising_edge(i_sys_clock) then
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-- First Byte to Read/Write
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if (i_end_of_tx = '1') then
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non_volatile_second_byte <= '0';
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-- Next Byte to Write
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elsif (i_command = WRITE_NON_VOLATILE_COMMAND) then
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-- Second Byte to Write only
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if (non_volatile_bit_counter = "00") then
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non_volatile_second_byte <= '1';
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else
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non_volatile_second_byte <= '0';
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end if;
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-- Next Byte to Read
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elsif (i_command = READ_NON_VOLATILE_COMMAND) then
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-- Second Byte to Read only
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if (non_volatile_first_byte = '1') then
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non_volatile_second_byte <= '1';
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else
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non_volatile_second_byte <= '0';
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end if;
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end if;
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end if;
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end process;
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----------------------------------------
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-- Non-Volatile Configuration Handler --
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----------------------------------------
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process(i_sys_clock)
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begin
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if rising_edge(i_sys_clock) then
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-- Second Byte to Read/Write
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if (non_volatile_second_byte = '1') then
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-- Write Non-Volatile Configuration Register
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if (i_command = WRITE_NON_VOLATILE_COMMAND) then
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non_volatile_spi_mode_reg <= i_data_to_mem(NON_VOLATILE_CONFIG_REG_SPI_QUAD_BIT) & i_data_to_mem(NON_VOLATILE_CONFIG_REG_SPI_DUAL_BIT);
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-- Read Non-Volatile Configuration Register
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elsif (i_command = READ_NON_VOLATILE_COMMAND) then
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non_volatile_spi_mode_reg <= i_data_from_mem(NON_VOLATILE_CONFIG_REG_SPI_QUAD_BIT) & i_data_from_mem(NON_VOLATILE_CONFIG_REG_SPI_DUAL_BIT);
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end if;
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end if;
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end if;
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end process;
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-------------------------------------------------------------
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-- Enhanced Volatile Read/Write Byte Configuration Handler --
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-------------------------------------------------------------
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process(i_sys_clock)
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begin
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if rising_edge(i_sys_clock) then
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-- First Byte to Read/Write
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if (i_end_of_tx = '1') then
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enhanced_volatile_first_byte <= '1';
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-- Next Byte to Write
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elsif (i_command = WRITE_ENHANCED_VOLATILE_CONFIG_COMMAND) and (i_new_data_to_mem = '1') then
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enhanced_volatile_first_byte <= '0';
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-- Next Byte to Read
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elsif (i_command = READ_ENHANCED_VOLATILE_CONFIG_COMMAND) and (i_data_from_mem_ready = '1') then
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enhanced_volatile_first_byte <= '0';
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end if;
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end if;
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end process;
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---------------------------------------------
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-- Enhanced Volatile Configuration Handler --
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---------------------------------------------
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process(i_sys_clock)
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begin
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if rising_edge(i_sys_clock) then
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-- First Byte to Read/Write
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if (enhanced_volatile_first_byte = '1') then
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-- Write Enhanced Volatile Configuration Register
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if (i_command = WRITE_ENHANCED_VOLATILE_CONFIG_COMMAND) then
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enhanced_volatile_spi_mode_reg <= i_data_to_mem(ENHANCED_VOLATILE_CONFIG_REG_SPI_QUAD_BIT) & i_data_to_mem(ENHANCED_VOLATILE_CONFIG_REG_SPI_DUAL_BIT);
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-- Read Enhanced Volatile Configuration Register
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elsif (i_data_from_mem_ready = '1') and (i_command = READ_ENHANCED_VOLATILE_CONFIG_COMMAND) then
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enhanced_volatile_spi_mode_reg <= i_data_from_mem(ENHANCED_VOLATILE_CONFIG_REG_SPI_QUAD_BIT) & i_data_from_mem(ENHANCED_VOLATILE_CONFIG_REG_SPI_DUAL_BIT);
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end if;
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end if;
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end if;
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end process;
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------------------------
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-- Apply New SPI Mode --
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------------------------
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process(i_sys_clock)
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begin
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if rising_edge(i_sys_clock) then
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-- End of SPI Transmission Detection
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end_of_tx_reg0 <= i_end_of_tx;
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end_of_tx_reg1 <= end_of_tx_reg0;
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end if;
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end process;
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apply_new_spi_mode <= end_of_tx_reg0 and not(end_of_tx_reg1);
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------------------------------
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-- SPI Mode Output Register --
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------------------------------
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process(i_sys_clock)
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begin
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if rising_edge(i_sys_clock) then
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-- Reset
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if (i_reset = '1') then
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spi_mode_out_reg <= SPI_SINGLE_MODE;
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-- Apply New SPI Mode (at the End of SPI Transmission)
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elsif (apply_new_spi_mode = '1') then
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-- Reset Memory Command (use Non-Volatile SPI Mode)
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if (i_command = RESET_NON_VOLATILE_COMMAND) then
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spi_mode_out_reg <= non_volatile_spi_mode_reg;
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-- Write Enhanced Volatile Configuration Register (use Enhanced Volatile SPI Mode)
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elsif (i_command = WRITE_ENHANCED_VOLATILE_CONFIG_COMMAND) or (i_command = READ_ENHANCED_VOLATILE_CONFIG_COMMAND) then
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spi_mode_out_reg <= enhanced_volatile_spi_mode_reg;
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end if;
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end if;
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end if;
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end process;
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----------------------
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-- SPI Mode Outputs --
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----------------------
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-- SPI Single Mode Enable
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o_spi_single_enable <= '1' when (spi_mode_out_reg = SPI_SINGLE_MODE) else '0';
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-- SPI Dual Mode Enable
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o_spi_dual_enable <= '1' when (spi_mode_out_reg = SPI_DUAL_MODE) else '0';
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-- SPI Quad Mode Enable
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o_spi_quad_enable <= '1' when (spi_mode_out_reg(INTERNAL_REG_SPI_QUAD_BIT) = SPI_QUAD_MODE(0)) else '0';
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end Behavioral;
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