URL
https://opencores.org/ocsvn/spacewire/spacewire/trunk
[/] [spacewire/] [trunk/] [rtl/] [RegSWR.v] - Blame information for rev 27
Details |
Compare with Previous |
View Log
| Line No. |
Rev |
Author |
Line |
| 1 |
21 |
btltz |
//File name=RegSWR.v no module(don't added this file in the design hiberarchy). 2005-04-?? btltz@mail.china.com btltz from CASIC
|
| 2 |
|
|
//Description: Contains status/contrl regs for SpaceWire Router
|
| 3 |
|
|
//Abbreviations:
|
| 4 |
|
|
//Origin: SpaceWire Std - Draft-1 of ECSS(European Cooperation for Space Standardization),ESTEC,ESA.
|
| 5 |
|
|
//-- TODO: Make it easy to use (but enough flexibility)
|
| 6 |
|
|
////////////////////////////////////////////////////////////////////////////////////
|
| 7 |
|
|
//
|
| 8 |
|
|
//
|
| 9 |
|
|
|
| 10 |
|
|
reg [7:0] GPO; // addr: 0x
|
| 11 |
|
|
reg [7:0] err; // addr: 0x
|
| 12 |
|
|
reg [7:0] err_src ; // addr: 0x source of error
|
| 13 |
|
|
reg [7:0] tim_itv; // addr: 0x timer interval
|
| 14 |
|
|
reg [15:0] SPE_CTL [0:IO_PORTNUM]; // addr: 0x to set transmitter speed of each channel individually
|
| 15 |
|
|
reg [4:0] SWStatus [0:I_PORTNUM]; // addr: 0x switch status
|
| 16 |
|
|
reg [63:0] LSctrl; // addr: 0x LSer control
|
| 17 |
|
|
reg [63:0] CSctrl; // addr: 0x CSer control
|
| 18 |
|
|
|
| 19 |
|
|
|
| 20 |
|
|
|
| 21 |
|
|
// Network Management
|
| 22 |
|
|
reg RouterID; // addr: 0x Router Identity Register
|
| 23 |
|
|
|
© copyright 1999-2025
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.