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//2005-1-18 btltz@mail.china.com btltz from CASIC,China
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//File=Module=SPW_I_vlogcore 2005-2-18 btltz@mail.china.com btltz from CASIC,China
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//Description: SpaceWire RxTx top module with Wishbone interface to node device(the host) or communication memory.
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// "A SpaceWire node comprise one or more SpaceWire link interfaces
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// (encoder-decoders) and an interface to the host system,represents an interface between
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// a SpaceWire network and an application system using the network services."
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//Approximate area:
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//Origin: SpaceWire Std-Draft-1 of ECSS(European Cooperation for Space Standardization),ESTEC,ESA
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//
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//-- TODO:
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////////////////////////////////////////////////////////////////////////////////////
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//
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/*synthesis translate off*/
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`include "timescale.v"
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/*synthesis translate on */
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`define reset 1 // WISHBONE style reset
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`define USE_XIL_DEVICE // If use Xilinx device
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`define TOOL_NOTSUP_PORT_ARRAY //if the tools not support port array declaration
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module SPW_I_vlogcore #(parameter CH_NUM = 3) //Triple Modulo Redundant (TMR)
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( output [CH_NUM-1:0] Dout,Doutb, Sout,Soutb, //LVDS pad
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input [CH_NUM-1:0] Sin, Sinb, Din, Dinb, //LVDS pad. 8 pads/pin for 1 channel
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output int_LnkErr_o,
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output TICK_o, TICK_i,
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input reset,gclk
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);
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//////////////
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// LVDS IO
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//
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`ifdef USE_XIL_DEVICE
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wire [CH_NUM-1:0] Si,Di, So,Do;
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generate
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begin:Gen_LVDS_PADS
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genvar k;
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for (k=0; k<CH_NUM, k=k+1)
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IBUFDS_LVDS_25 inst_LVDS_Di ( .I(Din[k]) // P-channel data
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.IB(Dinb[k]) // N-channel data
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.O(Di[k]) ); // Non-differential data input
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IBUFDS_LVDS_25 inst_LVDS_Si ( .I(Sin[k]) // P-channel strobe
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.IB(Sinb[k]) // N-channel strobe
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.O(Si[k]) ); // Non-differential strobe input
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OBUFDS_LVDS_25 inst_LVDS_Do ( .I(Do[k]), //Non-differential data output
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.O(Dout[k]), //P-channel output
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.OB(Doutb[k]) ); //N-channel output
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OBUFDS_LVDS_25 inst_LVDS_So ( .I(So[k]), //Non-differential strobe output
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.O(Sout[k]), //P-channel output
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.OB(Soutb[k]) ); //N-channel output
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end //end block Gen_LVDS_PADS
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endgenerate
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`endif
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//////////////////////////
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// Synchronizer
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// between 2 clock domain
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synchronizer_flop #(WIDTH*2) inst_Syn_flops(.sync_data_out(),
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.data_in(),
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.clk(),
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.async_reset()
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);
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/********** Instantiations of low level modules ****************/
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////// Channels //////
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generate
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begin:G_channel
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genvar i;
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for(i=0; i<CHANNEL_NUM; i=i+1)
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SPW_CODEC #() CODEC_xChannels (
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);
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end
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endgenerate
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Gluelogic inst_fifo_crc ();
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WB_COMI_HOCI inst_WB_IF ();
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JTAG_spw inst_JTAG_IO ();
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endmodule
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`undef reset
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`undef USE_XIL_DEVICE
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`undef TOOL_NOTSUP_PORT_ARRAY
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