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https://opencores.org/ocsvn/neorv32/neorv32/trunk
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**SPI Interrupt**
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**SPI Interrupt**
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The SPI module provides a single interrupt to signal "transmission done" to the CPU. Whenever the SPI
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The SPI module provides a single interrupt to signal "transmission done" to the CPU. Whenever the SPI
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module completes the current transfer operation, the interrupt is triggered and has to be explicitly cleared again
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module completes the current transfer operation, the interrupt is triggered and has to be explicitly cleared again
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by setting the according `mip` CSR bit.
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by writing zero to the according <<_mip>> CSR bit.
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.SPI register map (`struct NEORV32_SPI`)
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.SPI register map (`struct NEORV32_SPI`)
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[cols="<2,<2,<4,^1,<7"]
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[cols="<2,<2,<4,^1,<7"]
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[options="header",grid="all"]
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[options="header",grid="all"]
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