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https://opencores.org/ocsvn/riscv_vhdl/riscv_vhdl/trunk
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Line 51... |
Line 51... |
tap_->write(addr_run_ctrl, 8, runctrl.buf);
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tap_->write(addr_run_ctrl, 8, runctrl.buf);
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} else if (args->size() == 2) {
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} else if (args->size() == 2) {
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runctrl.val = (*args)[1].to_uint64();
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runctrl.val = (*args)[1].to_uint64();
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tap_->write(addr_step_cnt, 8, runctrl.buf);
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tap_->write(addr_step_cnt, 8, runctrl.buf);
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DsuMapType::udbg_type::debug_region_type::control_reg ctrl;
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GenericCpuControlType ctrl;
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ctrl.val = 0;
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ctrl.val = 0;
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ctrl.bits.stepping = 1;
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ctrl.bits.stepping = 1;
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runctrl.val = ctrl.val;
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runctrl.val = ctrl.val;
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tap_->write(addr_run_ctrl, 8, runctrl.buf);
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tap_->write(addr_run_ctrl, 8, runctrl.buf);
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}
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}
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