URL https://opencores.org/ocsvn/altor32/altor32/trunk

Subversion Repositories altor32

[/] - Rev 32

Rev	Log message	Author	Age	Path
32	Switch memory interfaces to Wishbone (pipelined). Various bug fixes and improvements.	ultra_embedded	4112d 06h	/
31	Improvements to the execute stage logic.	ultra_embedded	4132d 06h	/
30	Fix verilog issues which break in XST.	ultra_embedded	4216d 09h	/
29	Added top level makefile	ultra_embedded	4216d 12h	/
28	Added instruction set simulator	ultra_embedded	4216d 12h	/
27	Initial drop of AltOR32 v2	ultra_embedded	4217d 05h	/
26	Prepare for new release	ultra_embedded	4217d 06h	/
25	Added Papilio Pro (XC6LX9) project. http://papilio.gadgetfactory.net/index.php?n=Papilio.PapilioPro	ultra_embedded	4412d 07h	/
24	Re-sync from local repository.	ultra_embedded	4412d 08h	/
23	- Bootloader code clean-up.	ultra_embedded	4650d 09h	/
22	- Added RTOS example project.	ultra_embedded	4650d 09h	/
21	- Added RTOS with port for AltOR32.	ultra_embedded	4650d 10h	/
20	- Added GPIO peripheral (with interrupt support).	ultra_embedded	4650d 12h	/
19	- IRQ_STATUS now reports all interrupts regardless of IRQ_MASK status.	ultra_embedded	4650d 12h	/
18	- Fixed sign extension handling of some l.sf**ui instructions.	ultra_embedded	4655d 02h	/
17	- Option to specify IRQ vector offset.	ultra_embedded	4658d 02h	/
16	- Clean-up.	ultra_embedded	4658d 02h	/
15	- Improved peripheral register interface. - Papilio XC3S250E FPGA project now uses pipelined core @ 32MHz.	ultra_embedded	4658d 09h	/
14	Added initial version of pipelined AltOR32 core.	ultra_embedded	4658d 13h	/
13	Fixed l.lhs sign extension bug. Removed duplicate instruction definitions.	ultra_embedded	4664d 13h	/