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Rev Log message Author Age Path
50 Adding function to do combinational unsigned division, problem that it would change the clock to 5Mhz :(
The combinational delay increased a lot

udivResult := CONV_STD_LOGIC_VECTOR(udivision(unsigned(A),unsigned(B)), 32);
intermediate_S := udivResult(nBits downto 0);		 leonardoaraujo.santos 4733d 21h /
49 Adding docs (Unsigned Division) leonardoaraujo.santos 4733d 21h /
48 Working on jump instrunctions (Imediate) leonardoaraujo.santos 4734d 22h /
47 Changing the Multiplexer3_1 (The one who chooses the alu input) selection signals leonardoaraujo.santos 4735d 06h /
46 Working on load instructions leonardoaraujo.santos 4735d 06h /
45 Preparing to test the load operation leonardoaraujo.santos 4735d 22h /
44 Start to work on store operation leonardoaraujo.santos 4735d 22h /
43 Solved an issue where the imediate values where switched from the memory values leonardoaraujo.santos 4736d 04h /
42 Changing Multiplexer to use the constants
Changing timing on top testbench (To have valid and stable data when the memory enable is asserted)		 leonardoaraujo.santos 4736d 04h /
41 Adding interesting website with VHDL I/O tutorial leonardoaraujo.santos 4736d 15h /
40 Adding feature to create file with source code tested from testControlUnit.vhd leonardoaraujo.santos 4736d 16h /
39 Adding file i/o support (Still on test) leonardoaraujo.santos 4736d 22h /
38 Working a little bit on documentation leonardoaraujo.santos 4737d 15h /
37 Working a little bit on documentation leonardoaraujo.santos 4737d 15h /
36 Adding top level testbench leonardoaraujo.santos 4737d 16h /
35 Adding test to add values from imediate... Now I will work a little bit on the tests with the ControlUnit and DataPath together leonardoaraujo.santos 4738d 04h /
34 Fixing time issues on ControlUnit and adding more tests leonardoaraujo.santos 4738d 16h /
33 Continue testControlUnit and fixing some errors on ControlUnit leonardoaraujo.santos 4738d 19h /
32 Cleaning room to start to play with the control unit testbench leonardoaraujo.santos 4739d 02h /
31 Adding store and load instructions ... (Now is a good time to stop a little bit and work on the testbench of the CPU) leonardoaraujo.santos 4743d 23h /

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