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Help with Xilinx Webpack
by Unknown on Mar 5, 2004 |
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To whom it may concern:
I am currently a student at California State Polytechnic University, Pomona. I am doing a senior project based on the DLP-USB245M chip. The problem is that I'm getting errors when trying to compile my VHDL code. These are the two errors that I'm getting. Could you guys illuminate on what might be wrong? ERROR:HDLParsers:1401 - D:/Senior_Project/Projects/USB/Scratch/usb_controller/../usb_controller. vhd Line 84. Object ft245_rd of mode OUT can not be read. ERROR:HDLParsers:1401 - D:/Senior_Project/Projects/USB/Scratch/usb_controller/../usb_controller. vhd Line 85. Object ft245_wr of mode OUT can not be read. Thank you very much Omar |
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Help with Xilinx Webpack
by Unknown on Mar 5, 2004 |
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On Friday 05 March 2004 03:54, omarcastz@netscape.net wrote:
Object ft245_rd of mode OUT can not be read.
This is a basic VHDL error: if you declare an argument as mode OUT then you can only assign values to it like ft245_rd but never use it in an expression like x And if you declare it as mode IN then you have the opposite restrictions. It is very tempting to just declare it as INOUT to solve your problem, but often it is better to create a new signal like signal ift245_rd : std_logic; ft245_rd ift245_rd x -- Jecel |
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